Orolia’s White Rabbit technology earned the “Best Time Stamping/Latency Measurement System” recognition during the TradingTech Insight Awards 2022 Europe program held in London on February 22. The White Rabbit System Network, developed by Orolia and its recently acquired partner Seven Solutions, provides resilience, time synchronization and frequency distribution.
The TradingTech Insight Awards highlight the leading providers of trading solutions for capital markets and focus on vendors providing exceptional and innovative trading infrastructure, technology, and data services.
“It has been fantastic to see such a high caliber of entries in our TradingTech Insight Awards Europe 2022,” said Angela Wilbraham, CEO of A-Team Group, which hosts the TradingTech Insight Awards Europe. “There are some really deserving winners and we congratulate Orolia on winning Best Time Stamping/Latency Measurement System and for their contribution to the financial trading technology industry.”
The White Rabbit protocol, which is the basis for the new IEEE-1588-2019 High Accuracy standard, allows the most accurate and precise synchronization of financial networks to measure and optimize latencies, have greater control over the data (thanks to time stamps), provide more resilience and comply with regulations.
“For some time now, our clients have felt the need to continue improving the performance of their network sync,” said Carlos Frias, sales engineer with Orolia. “It occurred to us to develop a High Accuracy Timing IP core (HATI) with the idea that the White Rabbit protocol could be extended to the customers’ devices that were based on FPGAs, therefore improving the interoperability offered until the end node. HATI contains a design that can be deployed on Layer 1 switches, FPGA-based NIC cards and custom FPGA design boards.”
Frias added the primary goal of the HATI core technology is to correct the internal clock offset after receiving periodic data exchanges from devices like Orolia’s WR-Z16. Typical use cases include:
- Embedding time synchronization inside an FPGA application performing timestamping.
- High-resolution time synchronization inside a trading algorithm or application.
- Inline latency monitoring for FPGA applications.
- Custom timing logic on an FPGA card or enabled switch.
This design demonstrates the capability to integrate a highly accurate timing system on FPGA-based boards. For this reason, it has a modular architecture that allows the IP tocoexist in different scenarios, Frias said.
